An issue has been identified in Arm C1-Pro before r1p2-50eac0, where, under certain conditions, a TLBI+DSB might fail to ensure the completion of memory accesses related to SME.
Project Subscriptions
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Advisories
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Fixes
Solution
No solution given by the vendor.
Workaround
No workaround given by the vendor.
References
| Link | Providers |
|---|---|
| https://developer.arm.com/documentation/111823 |
|
History
Mon, 02 Mar 2026 15:15:00 +0000
| Type | Values Removed | Values Added |
|---|---|---|
| Description | An issue has been identified in Arm C1-Pro before r1p2-50eac0, where, under certain conditions, a TLBI+DSB might fail to ensure the completion of memory accesses related to SME. | |
| Weaknesses | CWE-362 | |
| References |
|
Projects
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Status: PUBLISHED
Assigner: Arm
Published:
Updated: 2026-03-02T16:16:02.649Z
Reserved: 2026-01-15T15:26:49.754Z
Link: CVE-2026-0995
No data.
Status : Received
Published: 2026-03-02T15:16:31.910
Modified: 2026-03-02T15:16:31.910
Link: CVE-2026-0995
No data.
OpenCVE Enrichment
No data.
Weaknesses